Mastering AMBA CHI: Part 3—Transaction Flows

Understanding the abstract states of the CHI coherency protocol is necessary, but the true complexity of the specification lies in the multi-phase transaction flows. CHI decouples requests, snoops, responses, and data into independent packets, enabling out-of-order completion and highly optimized routing.

In this article, we trace the lifecycle of standard read and write transactions, dissecting how the channels interact to guarantee ordering and coherency.

The Multi-Phase Transaction Lifecycle

Unlike older protocols where a read is a simple request-data pair, CHI transactions often require four or more discrete phases. This complexity allows the Home Node (HN-F) to release tracking resources early and permits peer Request Nodes (RN-Fs) to exchange data directly.

Tracing a ReadShared Transaction

Consider an RN-F (let’s call it RN0) executing a load instruction that misses in its L1/L2 caches. It issues a ReadShared transaction to acquire a clean copy of the line.

1. Request Phase (REQ): RN0 sends a ReadShared flit on the REQ channel to the HN-F. The flit includes the address and a generated TxnID (Transaction ID).
2. Serialization and Snooping (HN-F processing): The HN-F receives the request, allocates a tracker entry, and becomes the Point of Serialization (PoS). It checks its Snoop Filter.
   • Scenario A (Clean Miss): The SF indicates no other RN holds the data. The HN-F issues a ReadNoSnp to the memory controller (SN-F).
   • Scenario B (Snoop Hit): The SF indicates RN1 holds the data in a Unique Dirty (UD) state. The HN-F sends a SnpSharedFwd (Snoop Shared Forward) on the SNP channel to RN1.
3. Data Return Phase (DAT):
   • In Scenario A, the SN-F returns the data to the HN-F, which forwards it to RN0 via the DAT channel.
   • In Scenario B, CHI utilizes Direct Data Transfer (DCT). RN1 sends the data directly to RN0 on the DAT channel, bypassing the HN-F. This significantly reduces latency and HN-F bandwidth consumption. RN1 simultaneously sends a snoop response to the HN-F.
4. Completion Phase (RSP): To manage ordering and tracker resources, CHI utilizes explicit completion acknowledgments.
   • The HN-F sends a RespSepData (Response Separated from Data) to RN0 on the RSP channel to indicate that the transaction is globally ordered.
   • Once RN0 receives both the data and the response, it sends a CompAck (Completion Acknowledge) back to the HN-F. Only upon receiving the CompAck can the HN-F deallocate its tracker entry, fully finalizing the transaction.

Tracing a WriteBack Transaction

When an RN-F evicts a modified line (e.g., in state UD or SD), it must push the data back to memory.

1. Request Phase (REQ): The RN-F sends a WriteBackFull request to the HN-F.
2. Data Buffer Allocation (RSP): The HN-F receives the request. However, it cannot accept data immediately without allocating buffer space. It sends a CompDBIDResp (Completion and Data Buffer ID Response) to the RN-F on the RSP channel. This message provides the RN-F with a DBID (Data Buffer ID) to use for the data transfer.
3. Data Transmission (DAT): The RN-F receives the DBID and sends the evicted data on the DAT channel, tagging the data flits with the provided DBID so the HN-F knows exactly which buffer to route it to.
4. Memory Write: The HN-F pushes the data down to the SN-F. The transaction completes when the HN-F deallocates its tracker. (No CompAck is required from the RN-F for standard writebacks).

Managing Identifiers: TxnID, TgtID, and DBID

Because channels operate independently, packets must carry extensive metadata to allow nodes to reconstruct the transaction.

• TgtID (Target ID) and SrcID (Source ID): The Network Layer routing headers. Every flit contains these to navigate the mesh/ring topology.
• TxnID (Transaction ID): Generated by the initiator (e.g., RN-F). The HN-F uses this ID in its responses so the RN-F can match the incoming data or response to the original outstanding request.
• DBID (Data Buffer ID): Generated by the recipient of data (e.g., HN-F during a writeback). It tells the sender exactly which internal buffer slot is reserved for the incoming payload, preventing head-of-line blocking and buffer overflows.

This decoupled, multi-phase architecture is the engine of CHI’s performance. However, this asynchronous environment creates massive potential for congestion and deadlock, which necessitates the complex flow control mechanisms we will analyze in Part 4.